---
license: mit
tags:
- pytorch
- safetensors
- threshold-logic
- neuromorphic
- sequential
- flipflop
---

# threshold-d-flipflop

D flip-flop (D latch) next-state logic as threshold circuit. Captures data input when clock is high.

## Circuit

```
D      ──┐
CLK    ──┼──► D-FF ──┬──► Q
Q_prev ──┘          └──► Qn
```

## Truth Table

| D | CLK | Q_prev | Q | Qn | Mode |
|---|-----|--------|---|----|----|
| X | 0 | 0 | 0 | 1 | Hold |
| X | 0 | 1 | 1 | 0 | Hold |
| 0 | 1 | X | 0 | 1 | Transparent |
| 1 | 1 | X | 1 | 0 | Transparent |

## Operation

```
CLK=0: Hold mode
  Q_next = Q_prev
  Output maintains previous state

CLK=1: Transparent mode
  Q_next = D
  Output follows input
```

## Logic

```
Q  = (CLK · D) + (~CLK · Q_prev)
Qn = (CLK · ~D) + (~CLK · ~Q_prev)
```

Equivalent to a 2:1 MUX selecting between D and Q_prev based on CLK.

## Architecture

| Component | Neurons |
|-----------|---------|
| Input logic (AND, NOT) | 5 |
| Hold paths | 2 |
| Output OR gates | 3 |

**Total: 10 neurons, 35 parameters, 3 layers**

## Edge-Triggered vs Level-Sensitive

This models **level-sensitive** behavior (D latch). For true edge-triggered D flip-flop, combine two D latches as master-slave.

## Usage

```python
from safetensors.torch import load_file

w = load_file('model.safetensors')

# Simulate over time:
q = 0
for d, clk in [(1,0), (1,1), (0,1), (0,0)]:
    q_next = compute(d, clk, q, w)
    q = q_next
```

## Files

```
threshold-d-flipflop/
├── model.safetensors
├── create_safetensors.py
├── config.json
└── README.md
```

## License

MIT