---
license: apache-2.0
base_model: Qwen/Qwen3.5-9B
tags:
- rtl
- verilog
- multi-agent
- code-generation
---

# ChipMATE-V-9B

- **Website:** https://chipmate.picasso-lab.com
- **GitHub:** https://github.com/zhongkaiyu/ChipMATE

This is the **Verilog code generation agent** of **ChipMATE**, released as the final checkpoint after the multi-agent reinforcement-learning stage described in our paper.

ChipMATE is a self-trained multi-agent framework for RTL generation that pairs a Verilog agent with a Python reference-model agent. The two agents cross-verify each other's outputs to produce high-quality RTL code **without relying on any golden testbench** -- matching the way correctness is established in real industrial chip-design flows.

## Model details

- **Track:** Verilog code generation
- **Backbone:** Qwen3.5-9B
- **Training stage:** Stage 2 (multi-agent RL) -- final checkpoint
- **Companion agent:** [core12345/ChipMATE-P-9B](https://huggingface.co/core12345/ChipMATE-P-9B)

## The ChipMATE model series

| | Verilog agent | Python ref-model agent |
|---|---|---|
| 4B | [core12345/ChipMATE-V-4B](https://huggingface.co/core12345/ChipMATE-V-4B) | [core12345/ChipMATE-P-4B](https://huggingface.co/core12345/ChipMATE-P-4B) |
| 9B | [core12345/ChipMATE-V-9B](https://huggingface.co/core12345/ChipMATE-V-9B) | [core12345/ChipMATE-P-9B](https://huggingface.co/core12345/ChipMATE-P-9B) |