docs: Phase 7 CUDA bench results (dsp)

README.md

@@ -59,34 +59,15 @@ Track progress: [ailiance-bench issues](https://github.com/ailiance/ailiance-ben
 For reference benchmarks on the `gemma-4-E4B` base, see the
 [base-vs-LoRA matrix](https://github.com/ailiance/ailiance-bench/blob/main/bench-results/compare_base_vs_lora.md).
 
-## Bench results — `ailiance-bench` Phase 6 (2026-05-11)
-
-Evaluated as part of the `mascarade` adapter family in
-[`ailiance/ailiance-bench`](https://github.com/ailiance/ailiance-bench)
-commit [`46801af`](https://github.com/ailiance/ailiance-bench/commit/46801af),
-on 7 hardware-design tasks against the base `gemma-e4b-eu-kiki-base` model.
-
-| Phase | Task                | base  | +mascarade | Δ vs base   |
-|-------|---------------------|------:|-----------:|------------:|
-| P1    | kicad-dsl           | 0.090 |      0.090 |           0 |
-| P1    | kicad-pcb           | 0.010 |      0.010 |           0 |
-| P1    | spice-sim           | 0.425 |      0.176 |     **−25** |
-| P2    | kicad-sch-gen       | 0.420 |      0.400 |          −2 |
-| P3    | **kicad-sch-extract** | 0.308 |  **0.785** |   **+48** 🥇 |
-| P4    | kicad-erc-abs       | 0.060 |      0.060 |           0 |
-| P5    | kicad-erc-delta     | 0.060 |      0.060 |           0 |
-
-**Verdict:** champion on **P3 KiCad schematic extraction (+48 pts) 🥇**. Recommended use: **DSP code analysis** (filter design review, algorithm understanding). Regresses on SPICE simulation reasoning (−25); prefer `eu-kiki` (the Gemma-4 curriculum adapter) for SPICE-sim and KiCad DSL/PCB generation.
-
-> **Cross-base disclaimer:** Phase 6 benchmarked the mascarade family on a
-> `gemma-e4b-eu-kiki-base` reference model for cross-adapter comparison.
-> This adapter is trained on `Qwen/Qwen3-4B-Instruct-2507` for production
-> deployment via Tower Ollama `:8004`. Domain semantics transfer; absolute
-> numbers may differ on the production base.
-
-See full scoreboard:
-[ailiance-bench Phase 6 README](https://github.com/ailiance/ailiance-bench#scoreboard-lora-phase-6--2026-05-11)
-· interactive viewer: [Ailiance-fr/playground](https://huggingface.co/spaces/Ailiance-fr/playground).
+## Bench results — ailiance-bench Phase 7 (CUDA, 2026-05-11)
+
+Functional eval via the parsers/scorers from [`ailiance/ailiance-bench`](https://github.com/ailiance/ailiance-bench) Phase 1 (`bench_kicad_functional`), ported to CUDA / transformers + PEFT for the Qwen3-4B-Instruct-2507 base.
+
+| Dataset | n | Composite score | Duration |
+|---|---:|---:|---:|
+| `emc-dsp-power` | 10 | **0.619** | 1137.1s |
+
+_Composite score combines structural-parse-ok, component-count match, ground-node presence, etc. — see `bench_kicad_functional.score_*` for the exact formula. Greedy decoding, max_tokens per `GEN_PARAMS`._
 
 ## Upstream base model — official evaluations